The instruction Table.7.5 can be modified to include opcodes for new instructions.

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5- The instruction Table.7.5 can be modified to include opcodes for new instructions. We need to have an instruction that complements a memory word, the instruction is given the symbol; COM. The opcode is 0111. Using the ADD microprogram as a guide, complete the microprogram for COM instruction in Table.5c. More details are available in Appendix C instruction is given the symbol: COM Table.(Fig 7.5 RTL AC AC + M(EA) ACC 15): PC EA Symbol ADD BRANCH STORE EXCHANGE COM 0001 0010 0011 0111 AC ( MEA) Table.5a Microprogram Control memorya F3 AD Control memory address Decimal Binarv F1 F2 CD BR NOP NOP (000) (000) NOP READNOP U 000) 100 ADD NOP (001) (000) (000) (00) (00) ADD NOPI CALLINDRCT 01 1000011 NEXT 0000010 FETCH (1000000) 01 JMP 0000001 00 (00 NOP U JMP (0000010) Table.5b FETCH 64 1000000 67 1000011 INDRCT Table.5c Microprogram Control memory address F1 F2 F3 CD BR AD Decimal Binary COM 5- The instruction Table.7.5 can be modified to include opcodes for new instructions. We need to have an instruction that complements a memory word, the instruction is given the symbol; COM. The opcode is 0111. Using the ADD microprogram as a guide, complete the microprogram for COM instruction in Table.5c. More details are available in Appendix C instruction is given the symbol: COM Table.(Fig 7.5 RTL AC AC + M(EA) ACC 15): PC EA Symbol ADD BRANCH STORE EXCHANGE COM 0001 0010 0011 0111 AC ( MEA) Table.5a Microprogram Control memorya F3 AD Control memory address Decimal Binarv F1 F2 CD BR NOP NOP (000) (000) NOP READNOP U 000) 100 ADD NOP (001) (000) (000) (00) (00) ADD NOPI CALLINDRCT 01 1000011 NEXT 0000010 FETCH (1000000) 01 JMP 0000001 00 (00 NOP U JMP (0000010) Table.5b FETCH 64 1000000 67 1000011 INDRCT Table.5c Microprogram Control memory address F1 F2 F3 CD BR AD Decimal Binary COM