The linear feedback shift register (LFSR) is a shift register that utilizes a special feedback circuit to generate the serial input value. The feedback circuit is essentially the next-state logic. It performs xor operation on certain bits of the register and forces the register to cycle through a set of unique states. In a properly designed n-bit LFSR, we can use a few xor gates to force the register to circulate through 2^n - 1 states. A visualisation is shown in the next slide

The two LSB signals of the register are xored to generate a new value, which is fed back to the serial-in port of the shift register. Assume that the initial state of register is "1000". The circuit will circulate through the 15 (i.e., 2^4 - 1) states as follows: 1000, 0100, 0010, 1001, 1100, 0110, 1011, 0101, 1010, 1101, 1110, 1111, 0111, 0011, 0001

Note that the "0000" state is not included and constitutes the only missing state. If the LFSR enters this state accidentally, it will be stuck in this state. The construction of LFSRs is based on the theoretical study of finite fields. The term linear comes from the fact that the general feedback equation of an LFSR is described by an expression of the and and xor operators, which form a linear system in algebra. The theoretical study shows some interesting properties of LFSRs:

- An n-bit LFSR can cycle through up to 2^n - 1 states. The all-zero state is excluded

- A feedback circuit to generate maximal number of states exists for any n.

- The sequence generated by the feedback circuit is pseudorandom, which means that the sequence exhibits a certain statistical property and appears to be random. In pseudo number generation, the initial value of the sequence is known as a seed.

Starting with 0001, construct a VHDL description to realise the circulation [1000, 0100, 0010, 1001, 1100, 0110, 1011, 0101, 1010, 1101, 1110, 1111, 0111, 0011, 0001] as described in the previous slide.