The Machine Language in Appendix C 1RXY LOAD the register R with the bit pattern found in the memory cell whose address is XY.2RXY LOAD the register R with the bit pattern XY.3RXY STORE the bit pattern found in register R in the memory cell whose address is XY 40RS MOVE the bit pattern found in register R to register S.5RST ADD the bit patterns in register S and T and as though they were two's complement representations and leave the result in register R.6RST ADD the bit patterns in register S and T and as though they represent values in floating-point notation and leave the result in register R.7RST OR the bit patterns in registers S and T and place result in register R.8RST AND the bit patterns in registers S and T and place result in register R.9RST XOR the bit patterns in registers S and T and place result in register R.AROX ROTATE the bit pattern in register R one bit to the right X times. Each time place the bit that started at the low order end at the high order end.BRXY JUMP to the instruction located in the memory cell at address XY if the bit pattern in register R is equal to the bit pattern in the register number 0.

5. Translate the following instruction into machine language described in Appendix C. (5 points each) (1) AND the bit patterns found in register 1 and register 2 and place the result in register 3. (2) MOVE the bit pattern in register 5 to register 0.The Machine Language in Appendix C IRXY LOAD the register R with the bit pattern found in the memory cell whose address is XY. 2RXY LOAD the register R with the bit pattern XY. 3RXY STORE the bit pattern found in register R in the memory cell whose address is XY 40RS MOVE the bit pattern found in register R to register S. 5RST ADD the bit patterns in register S and T and as though they were two's complement representations and leave the result in register R. 6RST ADD the bit patterns in register S and T and as though they represent values in floating-point notation and leave the result in register R. 7RST OR the bit patterns in registers S and T and place result in register R. 8RST AND the bit patterns in registers S and T and place result in register R. 9RST XOR the bit patterns in registers S and T and place result in register R. AROX ROTATE the bit pattern in register R one bit to the right X times. Each time place the bit that started at the low order end at the high order end. BRXY JUMP to the instruction located in the memory cell at address XY if the bit pattern in register R is equal to the bit pattern in the register number 0. Otherwise, continue with normal sequence of execution. COOO HALT execution.COOO HALT execution. Hexadecimal table Hexadecimal Hexadecimal Bit Pattern Representation Bit Pattern Representation 0000 1000 0001 1001 0010 1010 0011 1011 JaUAWNEO 0100 1100 0101 1101 0110 1110 0111 1111