The MIPS sequence corresponding to the following high$-$level programming language:

X $=$ c $+$ b;

Y $=$ f $-$ e;

Is given below. X$,$ b$,$ c$,$ Y$,$ e$,$ f are in memory. Rb refers to register name Rb$.$

LW Rc$,$ c

LW Rb$,$ b

ADD RX$,$ Rc$,$ Rb

SW X$,$ RX

LW Rf$,$ f

LW Re$,$ e

SUB RY$,$ Rf$,$ Re

SW Y$,$ RY

a$.$ Will execution of this MIPS sequence of code cause any delays in the $5-$stage MIPS pipeline? Explain your answer. You can demonstrate it through execution or provide detailed explanation.