The new processor has $8$ pipeline stages, and each stage takes $6\mathrm{.}0$ ns to complete.

When the following MIPS assembly program is executed, how much faster is the

new pipelined processor against a non$-$pipelined processor? $[$Assume the non$-$

pipelined processor requires $40$ns to complete $1$ instruction.$]$

Instruction # Instructions

$1.$ add $v$1,$ $t$8,$ $t$4$

$2.$ sub $t$3,$ $t$6,$ $v$1$

$3.$ add $s$4,$ $t$3,$ $t$3$

$4.$ nop

$5.$ nop

$6.$ slt $at$,$ s$4,$ $v$1$