The next$-$gen MIPS processor has six processing stages, where each stage takes $200$ ps

to execute. A set of instructions is executed sequentially and also in a full$-$pipelined manner. You

are required to compute the speedup $($if any$)$ due to pipelining for each of the following three cases.

a$)$ There are $6$ instructions in the set.

b$)$ There are $14$ instructions in the set.

c$)$ There are n instructions in the set and n goes to infinity.

Speedup is defined as time take when instructions are executed sequentially divided by the time when

they are run in a pipeline. Assume all stages are used when run sequentially.