The only DFG graph given is in the question

Q 1(a) [12 Marks] Consider the Data Flow Graph (DFG) below. Assuming that the multipliers and adders take 1 time unit, identify all the loops in the DFG and compute the critical loop bound 10 9 [5 Marks] Q 1(b) For the DFG in Q1 (a), calculate the critical path delay Q 1(C) [10 Marks] Perform a retiming of the DFG, in Q1 (a). Draw the retimed DFG and calculate the new critical path delay. Explain the retiming methods used and describe/draw each step. Q 1(d) [6 Marks] Real time digital signal processing (RT DSP) may be divided into three categories based on their performance; name and explain each of them (furnish your explanation with examples) Q 1(a) [12 Marks] Consider the Data Flow Graph (DFG) below. Assuming that the multipliers and adders take 1 time unit, identify all the loops in the DFG and compute the critical loop bound 10 9 [5 Marks] Q 1(b) For the DFG in Q1 (a), calculate the critical path delay Q 1(C) [10 Marks] Perform a retiming of the DFG, in Q1 (a). Draw the retimed DFG and calculate the new critical path delay. Explain the retiming methods used and describe/draw each step. Q 1(d) [6 Marks] Real time digital signal processing (RT DSP) may be divided into three categories based on their performance; name and explain each of them (furnish your explanation with examples)