The scheme shown in Fig. gates Ihe d ock to control the serialtransfer of data from shifl register A to shift registe r H Lsing multiplexers at the input of each cell o f the shifl registers de eop

a structural model uf an alterna tive circuit that docs not alter the d ock path. The top level of the

design hierarchy is to instantiate the shift registers. The modu le describing the shift register is to

have instantiations of Flipfl ops and rnuxcs. Describe\'the mux and fl ipflop mod ules with behav

ioral models. Be sure to consider rese t Develop a test bench simulate the circ uit and demo nstrate the transfer of data.