Question: The three circuits demonstrated below are implementing the same logic. Assuming the output load at the output of every circuits is 3 0 0 C

The three circuits demonstrated below are implementing the same logic. Assuming the output load at the output of every circuits is 300 C and the input gates are minimum sized. What is the optimum achievable delay of each circuit with proper sizing. Which one is faster? A unit-sized inverter has R=10K and C=0.1fF.
Hint: You don't need to find the gate sizes to find the minimum possible delay and H and B is same for all the three circuits.
The three circuits demonstrated below are

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