write a program truthtable.c that reads a file containing a description of a digital logic circuit and generates the truth table for that circuit. A truth table lists all possible combinations of input values and their corresponding output values for a given circuit. How Does It Work? The program takes a single argument, the file name containing the circuit description. The file describes:

Input variables: The names of the circuit$$s inputs.

Output variables: The names of the circuit$$s outputs.

Logic gates: The gates that make up the circuit, their input$-$output connections, and any temporary connections.

The program should parses this description, builds a model of the circuit, and calculates the truth table based on all possible input combinations.

If no file is provided or if more than one file is given, the behavior is undefined, but the program should print an error message or read from standard input.

Circuit Description Language The circuit is described in a custom text$-$based language with specific directives and parameters. The following are the key directives:

Directives:

INPUT n i$1...$ in

Declares n input variables.

Example: INPUT $3$ a b c

declares three input variables: a$,$ b$,$ and c$.$

OUTPUT n o$1...$ on

Declares n output variables.

Example: OUTPUT $1$ z declares one output variable: z$.$

Logic Gates: NOT i o: Represents a NOT gate. Computes o $=$ NOT$($I$).$ AND i$1$ i$2$ o: Represents an AND gate. Computes o $=$ i$1$ AND i$2.$ OR i$1$ i$2$ o: Represents an OR gate. Computes o $=$ i$1$ OR i$2.$

NAND i$1$ i$2$ o: Represents a NAND gate. Computes o $=$ NOT$($i$1$ AND i$2).$ NOR i$1$ i$2$ o: Represents a NOR gate. Computes o $=$ NOT$($i$1$ OR i$2).$ XOR i$1$ i$2$ o: Represents an XOR gate. Computes o $=$ i$1$ XOR i$2.$

Special Gates:

DECODER n i$1...$ in o$0...$ o$2^$n$-1$: An n$-$to$-2$ decoder.Inputs represent an n$-$bit binary number, and only one output is high based on the binary value of the inputs.

MULTIPLEXER n i$0...$ i$2^$n$-1$ s$1...$ sn o: A $2-$to$-1$ multiplexer. Selects one of the $2$ inputs as output o$,$ based on the selector inputs s$1...$ sn$.$

PASS i o: Represents a direct connection. Computes o $=$ I.

Rules and Constraints:

Input variables are declared using the INPUT directive and are used only as inputs to gates. Output variables are declared using the OUTPUT directive and are computed once in the circuit. Temporary variables are created during the circuit's computation and must appear as outputs of one gate and inputs to another. They are neither inputs nor final outputs. Fixed constants: $0$ and $1$ Discarded outputs are represented with $\_.$

Parsing Guidelines: The circuit description should be parsed as a sequence of tokens separated by whitespace $($spaces$,$ tabs$,$ or newlines$).$ Each directive has a specific format, and the program should verify that all inputs and outputs are well$-$defined. Use fscanf$()$ with a format code like $\%16$s to read tokens up to $16$ characters long.

Example Circuit Descriptions:

Half$-$Adder:

INPUT $2$ A B

OUTPUT $2$ C S

AND A B C

XOR A B S

$-$ Inputs: A$,$ B$.$ Outputs: C $($carry$),$ S $($sum$).$

$3-$Argument AND Gate:

INPUT $3$ a b c

OUTPUT $1$ d

AND a b x

AND c x d

$-$ Temporary variable: x

Multiplexer:

INPUT $3$ A B C

OUTPUT $1$ Z

MULTIPLEXER $300011011$ A B C Z

Decoder Example:

INPUT $3$ A B C

OUTPUT $1$ Z

DECODER $3$ A B C $\_\_\_$ p q $\_$ r s

OR p q t

OR r s u

OR t u Z

Program Output:

The program should a truth table where, each column corresponds to an input or output variable. Columns are separated by a space, and a vertical bar $(|)$ separates input and output columns.Example truth table:

$000|00$

$001|01$

$010|10$

$011|11$

Design Considerations:

Reading Input: Use a function like fscanf$()$ to read and check if the format is correct.

Handling Sorted $($Part $1)$ vs$.$ Unsorted $($Part $2)$ Descriptions:

Part $1($Sorted$)$: Temporary variables appear as outputs before they are used as inputs. Gates can be evaluated in the given order.

Part $2($Unsorted$)$: Temporary variables may appear as inputs before being defined. Implement a dependency$-$resolution step to reorder the gates correctly. Switching Between Parts: Add a mode flag $($e$.$g$.,$ is$\_$sorted$)$ to toggle between Part $1$ and Part $2$ behaviors.

Simulation: Evaluate all gates for every possible input combination:

Part $1$: Evaluate gates in order.Part $2$: Resolve dependencies before evaluation.

Output Formatting: Ensure truth tables match the specified format.

Error Handling: Detect invalid inputs $($undefined variables, circular dependencies, etc.$).$Ensure temporary variables are used properly.

Efficiency: Use integer$-$based logic to AVOID floating$-$point calculations. Optimize gate evaluations for speed.

Run the program with a file containing the circuit description:

$ $./$truthtable my$-$circuit.txt