Question: The two series NFETs shown below are the bottom half of a NAND gate that has had both of its inputs switched instantly from GND

The two series NFETs shown below are the bottom half of a NAND gate that has had both of its inputs switched instantly from GND to VDD. Using our standard device parameters, and ignoring the body effect, channel length modulation and velocity saturation (i.e. just use the simple linear and saturation region equations rather than the unified equation with velocity saturation, channel length modulation, etc.), identify the operating regions of the transistors and calculate the current. Our NFETs are 2m wide and 0.25m long, with a supply voltage of 2.5V. Hint: first take an educated guess on the operating region for M2 (M1 should be known from the given voltages) and subsequently find the voltage at their shared node to verify your assumption. Vto VDSAT k' = Cox NFET 0.43 0.4 0.63 115e-6 0.06

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