Topic 4

1) Show MIPS single cycle data path for the following load instruction set (where S0 and S1 are 32-bit general purpose registers and S0 has initialized with a value of zero):

lw S1, 8(S0)

2) Consider the following MIPS assembly code (where S0, S1, and S6 are 32-bit general purpose registers, and S0 has initialized with a value of zero):

i) addi S0, S0,5

ii) lw S6, 5(S0)

iii) addi S0, S0,3

iv) sw S1, 7(S0)

2.1) Show the immediate values (in hexadecimal) in register S0 after the execution of the instruction (i) and (iii).

2.2) Show the 32-bit physical memory addresses (in hexadecimal) of the instructions (ii), and (iv).

3) Consider the following MIPS assembly code (where S0, S1, and S2 are 32-bit general purpose registers, and S0 has initialized with a value of zero):

i) addi S0, S0,7

ii) sw S1, 8(S0)

iii) addi S0, S0,4

iv) lw S2, 4(S0)

3.1) Show the immediate value (in hexadecimal) in register S0 after the execution of the instruction (i) and (iii).

3.2) Show the 32-bit physical memory addresses (in hexadecimal) of the instructions (ii), and (iv).