Towards computer architecture experts, not sure if GPT is correct, so please be thorough, thank you.

Label$/$circle each letter$/$option that is most correct, or write true false

f$.$ Memory$/$instruction caches are possible because of the phenomena known as:

a$.$ spatial locality

b$.$ temporal locality

c$.$ static memory SRAM

d$.$ dynamic memory DRAM

rax, ah$,$ al$,$ rax, are not independent registers.

Modifying ah will not modify al but will modify Eax.

As we push integer values onto the stack, regarding the address in the

stack pointer, and the address in the base$/$frame pointer:

a$.$ they both decrease

b$.$ they both increase

c$.$ one increases, the other decreases

d$.$ options a$,$b$,$c$,$ are true

e$.$ options a$,$b$,$c are false

Whenever a jump instructions is executed:

a$.$ the rsp register is changed to the new instruction

b$.$ the rip register is changed to the new instruction

c$.$ the ebp register is initialized to the new stack

d$.$ a copy of the iflags register must be saved