Translate the following C++ code into this processor's assembly language. Write the instructions only. A and B are 16-bit integers stored in memory. The memory address of A is stored in the register R0, and the memory address of B is stored in the register R1 maU ALId if (A == B) Att; else A da COrK, stee. (> 6. What is the value of the register R5 after executing the following load instruction if the memory content at the address stored in the register R2 is OxAABB LW R5, O(R2) # R5 = Memory [R[R2]+0] 7. Assume you are asked to add the following pseudo instruction to the assembler of this architecture. To which machine instruction(s) will you translate the following pseudo instruction. Please use from the instructions listed in point 8 of the architecture specifications above. BGT Rs, Rt, Label # jump to Label if Reg[Rs] > Reg[Rt] 8. Translate the following assembly instruction of this architecture into its corresponding machine code assuming that the opcode of the SW is 0101 and the address mode is 01