Question: TYPE array 1 IS ARRAY ( 7 DOWNTO 0 ) OF STD _ LOGIC; TYPE array 2 IS ARRAY ( 3 DOWNTO 0 , 7

TYPE array

1

IS ARRAY

(7

DOWNTO

0)

OF STD

_

LOGIC;

TYPE array

2

IS ARRAY

(3

DOWNTO

0, 7

DOWNTO

0)

OF STD

_

LOGIC;

TYPE array

3

IS ARRAY

(3

DOWNTO

0)

OF array

1

;

SIGNAL a : BIT;

SIGNAL b : STD

_

LOGIC;:

SIGNAL x : array

1

;

SIGNAL y : array

2

;

SIGNAL w : array

3

;

SIGNAL z : STD

_

LOGIC

_

VECTOR

(7

DOWNTO

0)

;

Determine the dimensions

(1

1

, 2

, 1

,

or scalar

)

od the VHDL signal given and give the numeric example for each signal. For example a

< =' 1'

;

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