undefined

a) Fill the truth table of the given sequential logic circuit. Assume that (1) Q is the value of the output after the circuit have been given enough time to produce the output according to the inputs, (2) the inputs A, B and C will always return back to 000 after every operation, (3) when the inputs return back to 000, they will not transit any of forbidden input combination(s). If you feel the older Q value will be preserved by the input combination, put Latch in the table for the output Q. (7 points) A B - T X1 b) A circuit composed of 3 rising edge-triggered D flip-flops is connected as shown below. Ignore propagation delays. Assuming the output Qo, Q1 and Q2 of D flip-flops are all 0 initially. Complete the timing diagram below for the outputs of this circuit, and state what the circuit does with respect to the CLK(clock) input by referring to the timing diagram. (8 points) Q ola CLK CLK Q 1