Using $7476$a J$-$K flip$-$flops and $555$ timer, Design and wire a $4-$bit Ripple counter$($ aka Asynchronous Divid$-$by $16$ counter$)$ sequencing $0$ to $15.$ Hook the outputs of the counter to the LEDS on the logic designer.. Produce a logic diagram and simulation Quartus II for this counter. Please make the physcial circuit and provide in pdf form the logic diagram and simulation from Quartus II