Using a 3:8 binary decoder (shown below) with 1-hot logicand OR gate, implement F(A,B,C)= (m3, m5, m7).

b) As opposed to the 1-hot convention presented in class, the 0-cold logic decoder works the same way as the decoder in (a) but with all outputs inverted. In this case, the decoded output produces one logic 0 and 1s for all others. The symbol is as follows:

Modify the design from part (a) to work with the 0-cold logic decoder and implement the same function from (a). Why would the 0-cold decoder be better suited for a CMOS application?

3:8 Decoder 01234567 3C 210 SSS