Question: Processors contain an array of registers called a register file. They are usually implemented using RAM. However, in this part, you will build a register


Processors contain an array of registers called a register file. They are usually implemented using RAM. However, in this part, you will build a register file using regular registers with flip- flops. N N address W address_r 2N x BITS WE data w A data r BITS BITS Write Port Read Port Figure 1: Register File Figure 1 shows a register file that contains 2N registers (rows) and each row is of size BITS (columns). This particular implementation utilizes two ports, a write port and a read port. The dual ports allow a user to access the register file for reading and writing simultaneously. You can write a new word into the register file by placing it at data_w and specifing the write address on address_w, asserting We will then invoke the write operation. A similar process can be used for reading a word from the register file, place an address on address_r and data r will have the word stored at that address. Generic Register File 1. Build a generic register file (call it reg_file) that takes two parameters N and BITS. 2. The generic register file should utilize 2N registers and each of the registers should be of size BITS. 3. The write port can be implemented using an Nx2N binary decoder. 1 4. The read port can be implemented using an Nx2N binary decoder and a 2N Tri-State Buffers. 5. Use the following provided code: a. simple_register_load.v for the base registers b. decoder_generic.v whenever you need a decoder C. You need to figure out how a tri-state buffer works. Hint: the following implements a tri-state buffer of input a and output b assign b = (enable) ? a : l'bz; 6. Include a schematic diagram of your design with your submission Processors contain an array of registers called a register file. They are usually implemented using RAM. However, in this part, you will build a register file using regular registers with flip- flops. N N address W address_r 2N x BITS WE data w A data r BITS BITS Write Port Read Port Figure 1: Register File Figure 1 shows a register file that contains 2N registers (rows) and each row is of size BITS (columns). This particular implementation utilizes two ports, a write port and a read port. The dual ports allow a user to access the register file for reading and writing simultaneously. You can write a new word into the register file by placing it at data_w and specifing the write address on address_w, asserting We will then invoke the write operation. A similar process can be used for reading a word from the register file, place an address on address_r and data r will have the word stored at that address. Generic Register File 1. Build a generic register file (call it reg_file) that takes two parameters N and BITS. 2. The generic register file should utilize 2N registers and each of the registers should be of size BITS. 3. The write port can be implemented using an Nx2N binary decoder. 1 4. The read port can be implemented using an Nx2N binary decoder and a 2N Tri-State Buffers. 5. Use the following provided code: a. simple_register_load.v for the base registers b. decoder_generic.v whenever you need a decoder C. You need to figure out how a tri-state buffer works. Hint: the following implements a tri-state buffer of input a and output b assign b = (enable) ? a : l'bz; 6. Include a schematic diagram of your design with your submission
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