Using Dtype flips flops and Boolean logic gates, design a Finite State Machine that will count in the 4bit irregular decimal sequence [0, 2, 10, 5, 7].

To do this, you will need to perform the following steps:

(a) Draw the state diagram. (2 marks)

(b) Derive the nextstate table. (2 marks)

(c) Give the transition table for the D flipflop. (2 marks)

(d) Derive Karnaugh maps for the subcircuits mapping the previous state to the next state. (4 marks)

(e) Derive minimal SOP Boolean logic expressions for the flipflop inputs. (4 marks)

(f) Draw the circuit diagram. (4 marks)

(g) Is the circuit a Moore machine or a Mealy machine? (2 marks)