Using the DC operating conditions from the following table, give the noise margin HIGH $($NMH$)$ for the $74$ LS logic family.

DC Operating Conditions for a Sample of $7400$ Series Logic Families

$\backslash$table$[[\backslash$table$[[$Logic$],[$Family$]],$Year,DC Operating Condition,$\backslash$table$[[$Speed$],[($MHz$)]]],[V_{cc},V_{\text{O}\text{H}\text{m}\text{a}\text{x}},V_{\text{O}\text{H}\text{m}\text{i}\text{n}},$Volmax,Volmin,$V_{\text{I}\text{H}\text{m}\text{a}\text{x}},V_{\text{I}\text{H}\text{m}\text{i}\text{n}},V_{\text{I}\text{L}\text{m}\text{a}\text{x}},V_{\text{I}\text{L}\text{m}\text{i}\text{n}},$Icc,Iomax $($H$/$L$)],[$Orig$.($TTL$),1964,+5,+5,+2\mathrm{.}4,+0\mathrm{.}4,$GND$,+5,+2,+0\mathrm{.}8,$GND$,40$m$,-4/+16$m$,25],[$LS $($TTL$),1976,+5,+5,+2\mathrm{.}4,+0\mathrm{.}4,$GND$,+5,+2,+0\mathrm{.}8,$GND$,8\mathrm{.}8$m$,-\frac{4}{+}8m,40],[$HC $($CMOS$),1982,+2-6,V_{cc},0\mathrm{.}8*V_{CC},0\mathrm{.}33,$GND$,V_{CC},0\mathrm{.}7*V_{cc},0\mathrm{.}3*V_{cc},$GND$,40$u$,+/-25$m$,50],[$AC $($CMOS$),1985,+2-6,V_{Cc},0\mathrm{.}8*V_{cc},0\mathrm{.}33,$GND$,V_{cc},0\mathrm{.}7*V_{cc},0\mathrm{.}3*Vcc,$GND$,80$u$,+/-50$m$,125]]$

Note $1$: All voltage specifications have units of volts. All current specifications have units of amps.

Note $2$: The $V_0$ and $V_1$ specifications for the $AC$ and $HC$ logic families are worst case and vary depending on the $V_{cc}$ selection and the output current.

Note $3$: All specifications are given for the commercial temperature range $(74$ series$).$