Using the table below, calculate 60 divided by 17 using the hardware described in Figure 3.8 (below). You should show the contents of each register on each step. Assume both inputs are unsigned 6-bit integers. Step 0 1 2 3 4 5 6 7 64-bit ALU FIGURE 3.8 First version of the division hardware. The Divisor register, ALU, and Remainder register are all 64 bits wide, with only the Quotient register being 32 bits. The 32-bit divisor starts in the left half of the Divisor register and is shifted right 1 bit each iteration. The remainder is initialized with the dividend. Control decides when to shift the Divisor and Quotient registers and when to write the new value into the Remainder register. Remainder Action Divisor 64 bits Initial Vals Rem-Rem-Div Rem