We will implement a hypothetical instruction sw+ in the single-cycle pipeline. sw+ is a store word, with post increment that is found in some real architectures. It is encoded as an I-type instruction and performs the following operations:

Part (a) The single-cycle datapath from the lecture is shown below. Show what changes are needed to support sw+ instruction. You should only add wires and muxes to the datapath; do no modify the main functional units themselves (the memory, register file and ALU). (20 points)

Part (b) On the diagram, write (next to the signals name) values of all control signals required for the sw+ instruction. (10 points)

MIR[rs]) R[rt] R[rs] = R[s] + imm Field arg rs rt Bits 31-26 25-21 20-16 15-0 MIR[rs]) R[rt] R[rs] = R[s] + imm Field arg rs rt Bits 31-26 25-21 20-16 15-0