Question: What is the error of the following verilog code? module vending ( clk , reset,one,two,five,d , r ) ; input clk , reset,one,two,five; output reg

What is the error of the following verilog code?
module vending(clk,reset,one,two,five,d,r); input clk,reset,one,two,five; output reg d; output reg [2:0]r; reg [2:0]cnt=3'b000; //counter for counting money always@(posedge clk) begin if(reset==1) begin d<=0; r<=0; end else if(one==1) begin cnt<=cnt+3'b001; end //if entered token is 1 then count increases by 1 else if(two==1) begin cnt<=cnt+3'b010; end //if entered token is 2 then count increases by 2 else if(five==1) begin cnt[2:0]<=cnt[2:0]+3'b101; end //if entered token is 5 then count increases by 5 end always@(posedge clk) begin 36 if(cnt>=5) begin //if sufficient money enetered then drink will be issued d<=1; r[2:0]<=cnt[2:0]-3'b101; end //remaining amount else begin d<=0; r<=0; end end endmodule

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