Question: Which cache structure would generate the smallest miss rate for a cache with 8 - one word blocks given the sequence of accesses to the

Which cache structure would generate the smallest miss rate for a cache with 8-one word blocks given the sequence of accesses to the following memory addresses? (assume that the cache is initially empty)
10000000two
01000000two
10001000two
01011000two
00100000two
10101000two
00101000two
11011000two

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