Which statement below is wrong?

Group of answer choices

the edge of the saturation is when VCE $=0\mathrm{.}4$ V

In saturation mode, the collector$-$to$-$emitter resistance is very small.

VCE in the deep saturation is around $0\mathrm{.}2$ V

In the pnp transistor's active mode, IE$=$IC$+$IB