Why do load and store exclusive instructions in LEGv$8$ architecture require three registers?

To track the execution status of the load and store operations, the memory address, and the value to be loaded or stored.

To specify the memory address, the value to be loaded or stored, and the condition for the success or failure of the operation.

To store the memory address, the value to be loaded or stored, and the instruction pointer for branching in case of operation failure.

To indicate the size of the memory block to be loaded or stored, the memory address, and the condition for the success or failure of the operation.