wo roads intersect perpendicularly. $$One road is a highway road. $$One road is a country road. $$There is a traffic signal for each road. $$Traffic only runs in one direction on each road. $$There are no delays from external factors in this system, so it doesn$$t matter if the sun is visible. $$There is a bridge further down the highway. $$Each signal can be green or red. $($Yeah in reality there is yellow, but that makes this problem harder$)$Both signals can not be green at the same time, but there are times when both should be red. $$Cars and trucks use these roads. So do motorcycles. $$It doesn$$t matter how many people are in the vehicle. $$A vehicle is anything with wheels. $$There is an overall enable that corresponds to the sensor counting the vehicles being on or off; if the sensor is off, then the country road will have a red light. $$The vehicle counting sensor will always be functioning unless the system is not enabled. $$If you follow the country road you will find a pumpkin farm. $$There is a weather sensor that tells if it is snowing or not. $$There are three vehicles parked on the side of the road $$There is a counting sensor that tells how many vehicles pass through the intersection. $$All vehicles are treated equally independent of how many wheels it has. $$The counting sensor$,$weather sensor$,$and the sensor enable must be used as a factor to decide which color each signal is$.$Each time you have to change the signal color, you must temporarily have both signals red to avoid collisions. $$During the transition time for the signal, there will be no vehicles going through the light, so the counting sensor can be ignored. $($You can assume ideal behaviors of the drivers$)$The area has lots of wild turkeys roaming around and the occasional goose. $$Vehicles move at a constant speed. $$All vehicles are controlled by humans. Implementation specifications: $$Max of $4$FFs can be used, so keep that in mind with the number of states possible. $$You can assume that the speed of the vehicles, calculation time and clock period are ideal and don$$t have to be considered beyond a basic delay in the test bench to verify the logic. $$Only gate level and behavioral styles of SystemVerilog are allowed. $$Must utilize the transition and output equations developed $$Your main module must have a specific name and portlist to be eligible for complete grading. Variable names are abbreviations or simplifications of the part of the system they represent. When it is instantiated in the testbench, it will be done like this: traffic dut$(.$clk$($clk$\_$tb$),.$reset$($reset$\_$tb$),.$snow$($snow$\_$tb$),.$sys$\_$en$($sys$\_$en$\_$tb$),.$gh$($gh$\_$tb$),.$gc$($gc$\_$tb$),.$rh$($rh$\_$tb$),.$rc$($rc$\_$tb$),.$vehicle$($vehicle$\_$tb$))$

like can you make a drawing that shows the logic diagram