Write a verilog module code, test bench code, and user constraint file

In general, a sequence detector is a sequential logic circuit used to check an input stream labeled x and to produce an output Z+1 for the sequences: 101 and 1001. Use the following test sequence to verify your circuits operation:X = 110100110010110 Z =000100100010100. Make sure your circuit has a start state and the means to manually reset the flip-flops to the start state. Note that sequences may overlap, i.e., the circuit docs not reset to the start state when an output Z= 1 occurs. Testing your circuit will involve checking the correctness of every state and next states for all possible combination of inputs. In general, a sequence detector is a sequential logic circuit used to check an input stream labeled x and to produce an output Z+1 for the sequences: 101 and 1001. Use the following test sequence to verify your circuits operation:X = 110100110010110 Z =000100100010100. Make sure your circuit has a start state and the means to manually reset the flip-flops to the start state. Note that sequences may overlap, i.e., the circuit docs not reset to the start state when an output Z= 1 occurs. Testing your circuit will involve checking the correctness of every state and next states for all possible combination of inputs