Write a Verilog program that simulates the outputs of gray-code-to-binary-code converter. First write a module namedGBCwhich takesw, x, y, zas inputs anda, b, c, das outputs. Then write a test bench module namedbcd_tb to test the GBC module. Compile and run your program and show the outputs for all 16 combinations ofw, x, y, z

please make sure you write the module and the test bench. and compile and run the code using verilog.