Question: Write a VHDL description code for a self starter 4 bit sequence counter that counts up/down odd numbers. All unused states should go to state

Write a VHDL description code for a self starter 4 bit sequence counter that counts up/down odd numbers. All unused states should go to state 0001. Use UD input as your up/down controller. If UD = 1 count up and if UD = 0 count down.

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