Write an Verilog code for a 8-bit subtractor (Bits are in 1's complement) using the following:

1. 5-bit parallel adder

2. 3-bit parallel adder

The condition are as follows:

1. The Most Significant bits of the subtractor must be given to the 5-bit parallel adder.

2, The Least Significant bits of the subtractor must be given to the 3-bit parallel adder.

3. The input A will be assign to the switches with the least significant bit A[0] linked to SW0. Similarly A[1] should be linked to SW1 , A[2] to SW2 and so on.

4. The input B will be assign to the switches with the least significant bit B[0] linked to SW8, Similarly B[1] should be linked to SW9, B[2] to SW10 and so on.

5. The output S will be assign to the LEDs with the least significant bit S[0] linked to LD0, Similarly S[1] should be linked to LD1, S[2] to LD2 and so on.

6. LD15 will be used to represent the carry bit of final output S.

7. The addition and subtraction operators (+,-) are not allowed in the codes.