Question: Write verilog modules and a test bench to check whether the following expressions are correct. Use both the structural description and behavioral description (or dataflow

  1. Write verilog modules and a test bench to check whether the following expressions are correct. Use both the structural description and behavioral description (or dataflow modeling).

x * ( x + y + z ) * ( x' + y ) * ( x + q ) * ( x + q' + z ).

x * ( x + y + z' ) * ( x' + z ) * ( y + z' ) * ( x + z )

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