Question: You are the analogue design engineer at DLink Circuits Technologies. Your latest task is to design an amplifier regardless of the stages using single-stage topologies.

 You are the analogue design engineer at DLink Circuits Technologies. Your

You are the analogue design engineer at DLink Circuits Technologies. Your latest task is to design an amplifier regardless of the stages using single-stage topologies. For example, you are allowed to design a Double Stage Amplifier by cascading two single-stage topologies. However, due to the business requirement, your on-chip amplifier design should not exceed 0.04mm and be capable of operating with a single supply voltage of 1.5V. In addition, the device parameters supplied by process engineer are listed in Table 1. Table 1 Device Specifications Name Technology Threshold Voltage unCox Specification Silterra 0.13 um CMOS 0.4 V 100 UA/V2 A. After an exhaustive study, you decide that the amplifier should meet the following specifications: 1. Total on-chip resistance: 70k 2 (-) 600. This specification needs you to determine the topology used. You have to debate your chosen topology to meet the specification. You may relate this specification with the specification set in 1. 3. Your drain current should be very small, which is less than milliampere (mA). You are forbidden from using the ideal current source in your design. Instead, you have to create your own load circuitry. All the specifications mentioned allows you to define your transistor/s aspect ratios and other required parameters. Therefore, you need to itemise your answers appropriately

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