An NMOS device has parameters \(V_{T N}=0.8 \mathrm{~V}, L=0.8 \mu \mathrm{m}\), and \(k_{n}^{\prime}=120 \mu \mathrm{A} / \mathrm{V}^{2}\). When the transistor is biased in the saturation region with \(V_{G S}=1.4 \mathrm{~V}\), the drain current is \(I_{D}=0.6 \mathrm{~mA}\).

(a) What is the channel width \(W\) ?

(b) Determine the drain current when \(V_{D S}=0.4 \mathrm{~V}\).

(c) What value of \(V_{D S}\) puts the device at the edge of saturation?