Using a computer simulation, investigate the \(Q\) and \(\bar{Q}\) values in the CMOS RAM cell shown in Figure 16.76 during read and write cycles for various transistor width-to-length ratios. In particular, consider the relations given by Equations (16.82) and (16.84).

Figure 16.76:-

Equation 16.82 and 16.84:-

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CD VDD VDD Pull-up transistors Mp4 Mp3 VDD D Mp1 Mp2 MB Q MA CD MNI MN2 Word line Figure 16.76 CMOS RAM cell including PMOS pull-up transistors