The IBM Power architecture specification does not dictate how a processor should implement little-endian mode. It specifies only the view of memory a processor must have when operating in little-endian mode. When converting a data structure from big endian to little endian, processors are free to implement a true byte-swapping mechanism or to use some sort of an address modification mechanism. Current Power processors are all default big-endian machines and use address modification to treat data as little-endian.
Consider the structure s defined in Figure 10.18.The layout in the lower-right portion of the figure shows the structure s as seen by the processor. In fact, if structure s is compiled in little-endian mode, its layout in memory is shown in Figure 10.12. Explain the mapping that is involved, describe an easy way to implement the mapping, and discuss the effectiveness of this approach.

Little-endian address mapping Byte address 11 12 13 14 00 00 01 02 03 04 05 06 07 21 22 23 24 25 26 27 28 08 08 09 OA OB 0C OD OE OF 'D': 'C' | 'B'l'A' | 31 32 33 34 10 012 13 14 15 16 17 51 52 GIFIE 18 | 18 19| IA IBICID IE IF 61 62 63 64 20 20 21 22 23 24 25 26 27 Figure 10.12 Power Architecture Little-Endian Structure s in Memory