Question: A sampled-data system closed-loop block diagram is shown in Figure DPI 3.6. Design D{z) to such that the closed-loop system response to a unit step

A sampled-data system closed-loop block diagram is shown in Figure DPI 3.6. Design D{z) to such that the closed-loop system response to a unit step response has a percent overshoot P.O.‰¤ 12% and a settling time T ‰¤ 20 s.

Digital controller Zero-order hold Gp(s) Yis) s(s 0.02) R(s)" T=1 Y= ]

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