Exercise 2.26 For this exercise, you will explore the range of branch and jump instructions in MIPS. For the following problems, use the hexadecimal data in the table below.

a. 0x00001000

b. 0xFFFC0000 2.26.1 [10] <2.6, 2.10> If the PC is at address 0x00000000, how many branch (no jump instructions) do you need to get to the address in the table above?

2.26.2 [10] <2.6, 2.10> If the PC is at address 0x00000000, how many jump instructions (no jump register instructions or branch instructions) are required to get to the target address in the table above?

2.26.3 [10] <2.6, 2.10> In order to reduce the size of MIPS programs, MIPS designers have decided to cut the immediate fi eld of I-type instructions from 16 bits to 8 bits. If the PC is at address 0x0000000, how many branch instructions are needed to set the PC to the address in the table above?

For the following problems, you will be using making modifi cations to the MIPS instruction set architecture.

a. 8 registers

b. 10 bit immediate/address fi eld 2.26.4 [10] <2.6, 2.10> If the instruction set of the MIPS processor is modifi ed, the instruction format must also be changed. For each of the suggested changes above, what is the impact on the range of addresses in a beq instruction? Assume that all instructions remain 32 bits long and any changes made to the instruction format of I-type instructions only increase/decrease the immediate fi eld of the beq instruction.
2.26.5 [10] <2.6, 2.10> If the instruction set of the MIPS processor is modifi ed, the instruction format must also be changed. For each of the suggested changes above, what is the impact on the range of addresses a jump instruction? Assume that instructions remain 32 bits long and any changes made to the instruction format of J-type instructions only impact the address fi eld of the jump instruction.
2.26.6 [10] <2.6, 2.10> If the instruction set of the MIPS processor is modifi ed, the instruction format must also be changed. For each of the suggested changes above, what is the impact on the range of addresses a jump register instruction, assuming that each instruction must be 32 bits.