Question: Exercise 2.27 In the following problems, you will be using exploring different addressing modes in the MIPS instruction set architecture. These different addressing modes are
Exercise 2.27 In the following problems, you will be using exploring different addressing modes in the MIPS instruction set architecture. These different addressing modes are listed in the table below.
a. Register Addressing
b. PC-relative Addressing 2.27.1 [5] <2.10> In the table above are different addressing modes of the MIPS instruction set. Give an example MIPS instructions that shows the MIPS addressing mode.
2.27.2 [5] <2.10> For the instructions in 2.27.1, what is the instruction format type used for the given instruction?
2.27.3 [5] <2.10> List benefi ts and drawbacks of a particular MIPS addressing mode. Write MIPS code that shows these benefi ts and drawbacks.
In the following problems, you will be using the MIPS assembly code as listed below to explore the tradeoffs of the immediate fi eld in the MIPS I-type instructions.
a. 0x00000000 lui $s0, 100 0x00000004 ori $s0, $s0, 40
b. 0x00000100 addi $t0, $0, 0x0000 0x00000104 lw $t1, 0x4000($t0)
2.27.4 [15] <2.10> For the MIPS statements above, show the bit-level instruction representation of each of the instructions in hexadecimal.
2.27.5 [10] <2.10> By reducing the size of the immediate fi elds of the I-type and J-type instructions, we can save on the number of bits needed to represent instructions. If the immediate fi eld of I-type instructions were 8 bits and the immediate fi eld of J-type instructions were 18 bits, rewrite the MIPS code above to refl ect this change. Avoid using the lui instruction.
2.27.6 [5] <2.10> How many extra instructions are needed to execute your code in 2.27.5 MIPS statements in the table versus the code shown in the table above?
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