First, show the block organization of the 16-bit carry save adders to add these 16 terms, as shown in Figure B.14.1. Assume that the time delay through each 1-bit adder is 2T. Calculate the time of adding four 4-bit numbers to the organization at the top versus the organization at the bottom ofFigure B.14.1.

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a0 b0 a3 b3 a2 b2 a1 b1 Traditional adder ез e2 e0 e1 Traditional adder f3 f2 f1 f0 Traditional adder s4 s3 s2 s0 $5 s1 b3 e3 f3 b2 e2 f2 b1 et f1 b0 e0 fo в Carry save adder аз, a2 a1 a0 Carry save adder c S s'1 (c'0 s'3c2 s'2 |c'1 s'0 s'4 c'3 Traditional adder s4 s3 s2 s0 $5 s1