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computer science
fundamentals digital logic
Fundamentals of Digital Logic and Microcontrollers 6th edition M. Rafiquzzaman - Solutions
What are the main logic elements/gates in a ROM chip?
Implement each of the following using an 8-to-1 multiplexer: (a) F(A, B, C, D)=A̅BC +A̅BD +A̅B̅C̅ +ACD̅(b) F(W, X, Y, Z) = ∑m(2, 3, 6, 7, 8, 9, 12, 13, 15)
Using a minimum number of multiplexers, and by manipulating the inputs, draw a schematic that will perform the following operations: Assume that A is a 4-bit unsigned number where A = a3a2a1a0 and B = a̅3 a̅2 a̅1 a̅0. S. So A 1510
Implement a digital circuit to increment (for Cin = 1) or decrement (for Cin = 0) a 4-bit signed number by 1 generating outputs in twos complement form. Note that Cin is the input carry to the full adder for the least significant bit. Draw a schematic:(a) Using only a minimum number of full adders
Determine the truth table for a hexadecimal-to-binary priority encoder with line 0 having the highest priority and line 15 with the lowest.
Draw a schematic of a full adder using a 74138 and a minimum number of external gates. Use minterms of the full adder.
Draw a logic diagram using a 74138 decoder and a minimum number of external gates to implement the following: F0(A, B, C)= ∑m(1,3,4), F1(A, B, C)= ∑m(0,2,4,7), F2(A, B, C)= ∑m(0,1,3,5,6), F3(A, B, C)= ∑m(2,6)
A combinational circuit is specified by the following equations: F0 (A, B, C) = A̅ B̅ C̅ + AB̅C = AB̅C̅F1 (A, B, C) = AB̅C̅ + ABC̅F2 (A, B, C) = A̅B̅C̅ + ABCF3 (A, B, C) = A̅BC + A̅BC̅ + ABC̅Draw a logic diagram using a decoder and external gates. Assume that the decoder outputs a
Design a combinational circuit using a minimum number of 74138s (3 8 decoders) to generate the minterms m1, m5, and m9 based on four switch inputs S3, S2, S1, S0. Then display the selected minterm number (1 or 5 or 9) on a seven segment display by generating a 4-bit input ( W, X, Y, Z) for a
Design a 4 16 decoder using a minimum number of 74138 and logic gates.
Design a combinational circuit that adds two 4-bit signed numbers and generates an output of 1 if the 4-bit result is zero; the output is 0 if the 4-bit result is nonzero. Draw a logic circuit using the block diagram of a 4-bit binary adder as the building block and a minimum number of logic gates.
Design a combinational circuit using full adders to multiply a 4-bit unsigned number by 2. Draw a logic diagram using the block diagram of a full adder as the building block.
Design a combinational circuit using a minimum number of full adders to decrement a 6-bit signed number by 2. Assume 6-bit result. Draw a logic diagram using the block diagram of a full adder as the building block.
Design a combinational circuit for a BCD to seven-segment code converter that will input a BCD number and output it on a seven segment commonanode display. The code converter will only display the number 8. The converter will turn the display OFF for all other valid BCD digits except digit 9 which
Design a BCD to seven-segment decoder that will accept a decimal digit in BCD and generate the appropriate outputs for the segments to display a decimal digit (0–9). Use a common anode display. Turn the seven segment OFF for non-BCD digits. Draw a logic circuit. What will happen if a common
Design a combinational circuit that converts a 4-bit BCD input to its nines complement output. Draw a schematic using logic gates. Show all steps clearly.
Design a combinational circuit with five input bits generating a 4-bit output that is the ones comple ment of four of the five input bits. Draw a logic diagram. Do not use NOT, NAND, or NOR gates.
Design a combinational circuit that accepts a three-bit unsigned number and generates an output binary number equal to the input number plus 1. Draw a schematic using logic gates. Show all steps clearly.
Design a combinational circuit with three inputs (A, B, C) and one output (F). The output is 1 when A + C = 0 or AC = 1; otherwise the output is 0. Draw a schematic using logic gates. Show all steps clearly.
Design a combinational circuit that accepts a two-bit unsigned number, A and B such that the output, F = A plus B. Note that AB = 112 will never occur. Draw a schematic using logic gates. Show all steps clearly
Determine the function F of the following logic diagram and then analyze the function using Boolean identities. Show that F can be represented by a single logic gate with A and B as inputs. A B F
Given the following circuit: (a) Derive the Boolean expression for F(A, B, C, D).(b) Derive the truth table.(c) Determine the simplified expression for F(A, B, C, D) using a K-map.(d) Draw the logic diagram for the simplified expression using NAND gates. F(A,B,C.D
Express the following functionsF1 and F2 in terms of the inputs A, B, and C. What is the relationship between F1 and F2? A - F, D- Do F2
Find function F for the following circuit: х Do м
Determine by inspection whether the function, F in each of the following is odd or even, and comment on the result:(a) F̅ = A⊕B⊕C(b) F = A⊕B⊕C
Draw a logic diagram for a two-input (A,B) Exclusive-OR operation using only four two-input (A,B) NAND gates. Assume that complemented inputs A̅ and B̅ are not available.
Design a parity generation circuit for a 5-bit data (4-bit message with an even parity bit) to be transmitted by computer X. The receiving computer Y will generate an error bit, E = 1, if the 5-bit data received has an odd parity; otherwise, E = 0. Draw logic diagrams for both parity generation and
Show that the Boolean function, f = A ⊕ B ⊕ AB between two variables, A and B, can be implemented using a single two-input gate.
Show analytically that A ⊕ (A ⊕ B) = B.
It is desired to compare two 4-bit numbers for equality. If the two numbers are equal, the circuit will generate an output of 1. Draw a logic circuit using a minimum number of gates of your choice.
Simplify each of the following functions for F using a K-map. Draw a logic diagram for each using NAND-only and NOR-only gates. (a) F(W, X, Y, Z) = Σ m(0, 2, 4, 8, 12)(b) F(W, X, Y, Z) = Σ m(0, 2, 4, 7, 11, 12, 13)(c) F(A, B, C, D) = Σ m(1, 3, 5, 6, 8, 9, 10, 14, 15)(d) F̅(A, B, C, D) = Σ
Minimize the following function F(A, B, C, D) = Σ m(6, 7, 8, 9) using a K-map assuming that the condition AB = 112 can never occur. Draw schematics using:(a) NAND gates (b) NOR gates
Minimize the following expression using a K-map: F = AB + A̅ B̅ C̅D̅ + CD̅ + A̅ B̅ C̅ Dand then draw schematics using:(a) NAND gates.(b) NOR gates.
Minimize the following expression using the Quine–McCluskey method. Verify the results using a K-map. Draw logic diagrams using NAND gates. Assume true and complemented inputs. F(A, B, C, D) = Σ m(0, 1, 4, 5, 8, 12) 108
Minimize each of the following functions for f using a K-map and don’t care conditions, d.(a) f(A, B, C) = Σ m(1, 2, 4, 7) d(A, B, C) = Σ m(5, 6)(b) f(X, Y, Z) = Σ m(2, 6) d(X, Y, Z) = Σ m(0, 1, 3, 4, 5, 7) (c) f(A, B, C, D) = Σ m(0, 2, 3, 11) d(A, B, C, D) = Σ m(1, 8, 9, 10)(d) f(A,
Find essential prime implicants and then minimize each of the following functions for F using a K-map: (a) F(A, B, C, D) = Σ m(3, 4, 5, 7, 11, 12, 15)(b) F(W, X, Y, Z) = Σ m(2, 3, 6, 7, 8, 9, 12, 13, 15)
Perform the following arithmetic operations in binary using 6 bits. Assume all numbers are signed decimal. Use twos complement arithmetic. Indicate if there is any overflow. a. 14 +8b. 07 +(-7)c. 27 +(-19)d. (-24) +(-19)e. 19 +(-12)f. (-17) +(-16)
Minimize each of the following expressions for F using a K-map in sums-of product form:(a) F(W, X, Y, Z) = W̅X̅YZ + WYZ(b) F = A̅ B̅ C̅ D + A̅CD + ABCD (c) F = (A̅ + B̅ + C + D̅)(A̅ + B + C + D̅)(A + B̅ + C + D̅)
Simplify each of the following functions for F using a K-map.(a) F(W, X, Y, Z) = Σ m(0, 1, 4, 5, 8, 9) (b) F(A,B,C,D) = Σ m(0, 2, 8, 10, 12, 14)(c) F̅(A,B,C,D) = Σ m(2, 4, 5, 6, 7, 10, 14)(d) F(W, X, Y, Z) = Σ m(2, 3, 6, 7, 8, 9, 12, 13)(e) F̅(W, X, Y, Z) = Σ m(0, 2, 4, 6, 8, 10, 12,
Minimize each of the following expressions for F using a K-map.(a) F(A,B,C) = B̅C̅ + ABC + ABC̅(b) F(A,B,C) = A̅BC̅ + BC(c) F(A,B,C) = A̅C̅ + A(B̅C̅ + BC̅)
Minimize each of the following functions using a K-map:(a) F(A, B, C) = Σ m(0, 1, 4, 5)(b) F(A, B, C) = Σ m(0, 1, 2, 3, 6)(c) F(X, Y, Z) = Σ m(0, 2, 4, 6)
Express each of the following expressions in terms of minterms and maxterms.(a) F = BC̅ + A̅B + B(A + C)(b) F = (A + B + C)(A̅ + B)
Using truth tables, express each one of the following functions and their complements in terms of sum of minterms and product of maxterms:(a) F = ABC + A̅BD + A̅ B̅ C̅ + ACD̅(b) F = (W+ X + Y)(WX + Y) Boolean Algebra and Digital Logic Gates 107
Using DeMorgan’s theorem, draw logic diagrams for ABC̅ + A̅B̅ + BC(a) Using only AND gates and inverters.(b) Using only OR gates and inverters.You may use two-input and three-input AND and OR gates for (a) and (b).
Simplify each of the following Boolean expressions as much as possible using identities: (a) XY + (1 Š• X) + XZÌ… + XYÌ… + XZ(b)(c) BC + ABCDÌ… + AÌ…BCD + ABCD(d) BC + ABCD + ABCD + ABCD(e)(f)(g) x zÌ…+ xÌ…yz + x
Prove the following identities algebraically and by means of truth tables:(a) (b)(c) (d) (e) (f) (A+B)(A+B) = 0 A+AB = A+ B
Draw a logic diagram using two-input AND and OR gates to implement the following function F = P(P + Q)(P + Q + R)(P + Q + R + S) without any simplification; then analyze the logic circuit to verify that F = P.
Draw a logic diagram to implement F = ABCDE using only 3-input AND gates.
Perform the following operation: A716 ⊕ FF16. What is the relationship of the result to A716?
Given A = 10012, B = 11012, find: A OR B; B Λ A; A̅; A ⊕ A.
Perform the following operations. Include your answers in hexadecimal. A616 OR 3116; F7A16 AND D8016; 3616 ⊕ 2A16
Perform the following binary addition operation; assume that the numbers are in two’s complement form. The express result in decimal. Determine sign and overflow flags. (0000 1111) + ( 1111 1100)
If a transmitting computer sends an 8-bit binary message 11000111 using an even parity bit. Write the 9-bit data with the parity bit in the most significant bit. If the receiving computer receives the 9-bit data as 110000111, is the 8-bit message received correctly? Comment.
Using the signed division algorithm described in section 2.5.1, find the quotient and remainder of (-25)/3.
Assume 2 two’s-complement signed numbers, M = 111111112 and Q = 11111002. Perform signed multiplication using the algorithm described in Section 2.5.1.
Repeat Problem 2.21 using repeated subtraction. Data From Problem 2.21Perform the following unsigned division in binary using a minimum number of bits required for each decimal number: 3√14
Repeat Problem 2.20 using repeated addition. Data From Problem 20Perform the following unsigned multiplication in binary using a minimum number of bits required for each decimal number using pencil and paper method: 12 x 52
Find the odd parity bit for the following binary message to be transmitted: 10110000.
Obtain the bit encodings of the following decimal numbers and then perform addition using BCD: 999 + 999
Obtain the bit encodings of the following decimal numbers and then perform the indicated arithmetic operations using BCD: a. 54 +48b. 782 +219c. 82 -58
Perform the following unsigned division in binary using a minimum number of bits required for each decimal number: 3√14
Perform the following unsigned multiplication in binary using a minimum number of bits required for each decimal number using pencil and paper method: 12 x 52
Using 9’s and 10’s complement arithmetic, perform the following arithmetic operations: (a) 25410 - 13210 (b) 78310 -80710
Using twos complement, perform the following subtraction: 3AFA16− 2F1E16. Include answer in hex.
Perform the indicated arithmetic operations in binary. Assume that the numbers are in decimal and represented using 8 bits. Express results in decimal. Use twos complement approach for carrying out all subtractions. a. 14 +17b. 34 +28c. 32 -14d. 34 -42
Perform the following unsigned binary addition. Include the answer in decimal. 1011 • 01+ 0110 • 011
Express the following binary numbers into excess-3:(a) 0101 1001 0111(b) 0110 1001 0000
Represent the following binary numbers in BCD:(a) 0001 1001 0101 0001(b) 0110 0001 0100 0100 0000
What is the excess-3 equivalent of octal 1543?
Represent the following numbers in excess-3:(a) 678(b) 32874(c) 61440
Provide the BCD bit encodings for the following decimal numbers: (a) 11264(b) 8192
Convert the following hex numbers to binary: 15FD16; 26EA16.
Convert 532.37210 into its binary equivalent.
Identify the following unsigned binary numbers as odd or even without converting them to decimal: 110011002; 001001002; 011110012.
Using 8 bits, represent the integers -48 and 52 in(a) Sign-magnitude form(b) Ones complement form(c) Twos complement form
Convert the following binary numbers into octal and hexadecimal numbers: (a) 1101011100101(b) 11000011100110000011
Convert the following numbers into hexadecimal:(a) 198710 (b) 307210
Convert the following numbers into octal: (a) 184310 (b) 176610
Convert the following numbers into binary: (a) 15210(b) 34310
Convert the following unsigned binary numbers into their decimal equivalents: (a) 011101012 (b) 1101.1012 (c) 1000.1112
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