Implement a digital circuit to increment (for Cin = 1) or decrement (for Cin = 0) a 4-bit signed number by 1 generating outputs in twos complement form. Note that Cin is the input carry to the full adder for the least significant bit. Draw a schematic:
(a) Using only a minimum number of full adders and multiplexers.
(b) Using only a minimum number of full adders and inverters. Do not use any multiplexers.