The control memory in Fig. 7-2 has 4096 words of 24 bits each. 

a. How many bits are there in the control address register? 

b. How many bits are there in each of the four inputs shown going into the multiplexers? 

c. What are the number of inputs in each multiplexer and how many multiplexers are needed?

Fig. 7-2

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Status bits Branch logic MUX select Clock Select a status bit Branch address Instruction code Mapping logic Multiplexers Control address register (CAR) Control memory Microoperations Subroutine register (SBR) Incrementer