In this problem, you will explore the design of a 32-bit floating-point multiplier. The multiplier has two

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In this problem, you will explore the design of a 32-bit floating-point multiplier. The multiplier has two 32-bit floating-point inputs and produces a 32-bit floating-point output. You may consider positive numbers only and use round toward zero (truncate). You may also ignore the special cases given in Table 5.2. 

Table 5.2 IEEE 754 floating-point notations for 0, too, and NaN Number Sign Exponent Fraction X 00000000 00000000000000000000000 11111111 00000000000000000000000 00 1. 11111111 00000000000000000000000 -00 NaN X 11111111 Non-zero

(a) Write the steps necessary to perform 32-bit floating-point multiplication.
(b) Sketch the schematic of a 32-bit floating-point multiplier.
(c) Design a 32-bit floating-point multiplier in an HDL. Simulate and test your multiplier to prove to a skeptic that it functions correctly.

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Related Book For  answer-question

Digital Design and Computer Architecture

ISBN: 978-0123944245

2nd edition

Authors: David Harris, Sarah Harris

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