Question: Suppose the MIPS multicycle processor described in Section 7.4 uses a virtual memory system. (a) Sketch the location of the TLB in the multicycle processor

Suppose the MIPS multicycle processor described in Section 7.4 uses a virtual memory system.
(a) Sketch the location of the TLB in the multicycle processor schematic.
(b) Describe how adding a TLB affects processor performance.

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