Write an HDL module for the FSM from Exercise 3.29.?

Data from problem 3.29

Your company, Detect-o-rama, would like to design an FSM that takes two inputs, A and B, and generates one output, Z. The output in cycle n, Z_n, is either the Boolean AND or OR of the corresponding input A_n and the previous input A_n-1, depending on the other input, B_n: Z_n= A_n A_n?1 if B_n= 0 Z_n= A_n + A_n?1 if B_n= 1(a) Sketch the waveform for Z given the inputs shown in Figure 3.71.?

(b) Is this FSM a Moore or a Mealy machine??

(c) Design the FSM. Show your state transition diagram, encoded state transition table, next state and output equations, and schematic.?

CLK A B Figure 3.71 FSM input waveforms