Code your design from Exercise 9.3 in VHDL and exhaustively verify it with a testbench. Data in
Question:
Code your design from Exercise 9.3 in VHDL and exhaustively verify it with a testbench.
Data in Exercise 9.3
Using an approach similar to the multiple-of-3 circuit of Section 9.1, design a multiple-of-5 circuit that outputs true iff its eight-bit input is a multiple of 5.
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Related Book For
Digital Design Using VHDL A Systems Approach
ISBN: 9781107098862
1st Edition
Authors: William J. Dally, R. Curtis Harting, Tor M. Aamodt
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