(a) Use Shannon’s expansion theorem to expand the following function around A and then expand each sub-function around D:

Z = AB’CD’E’F + A’BC’D’EF’ + B’C’E’F + A’BC’E’F’ + ABCDE

(b) Explain how the expanded function could be implemented using two Xilinx Kintex FPGA slices (Figure 6-13). On the slice diagrams, label the inputs to the LUTs (function generators) and draw the connection paths within the slice. Give the function implemented by each LUT.