Draw the hardware structures that will be inferred by typical synthesizers from the code excerpts that follow. If any ambiguities exist in the code, mention what you are assuming. Show optimized and unoptimized hardware.

(a) always @(a)
begin
case(a)
0: b = 2;
1: b = 0;
2: b = 3;
3: b = 1;
endcase
end

(b) if((arg1 > arg2)&&(arg1 > arg3))

result <= arg1;

else

result <= 0;